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Page Replacement Algorithms [174]



FIFO:

int fifo_alg() {
int save_reg,page,frame,earliest_time;
  save_reg = FTVR;
  earliest_time = INFINITY;
  do {
    FTVR++;
    if (FTVR >= FTLR) FTVR = 0;
    page = FTBR->entries[FTVR].page;
    if (page == NIL) return(FTVR);
    if (PTBR->entries[page].first_time < earliest_time) {
      earliest_time = PTBR->entries[page].first_time;
      frame = FTVR;
    }
  } while (FTVR != save_reg);
  FTVR = frame; 
  return(FTVR);
}



VM: MEM - A Simulator [175]

mem> h
i(nit    pages frames [pages in 1..20, frames in 1..20]
r(ead    page         [page  in 0..19]
w(rite   page         [page  in 0..19]
d(elete  page         [page  in 0..19]
l(ogical addr         [page:22bits offset:10bits]
a(lgorithm 0:FIFO|1:OPT|2:LRU_TIME|3:LRU_REF|4:CLOCK|5:LFU|6:MFU|
           7:ENHANCED|8:LRU_STACK
m(ode      0:DETAILED|1:FRAMES|2:SUMMARY
v(irtual   0:OFF|1:ON
n(ogo                 [save all reads for go]
g(o                   [do all reads; for SUMMARY try all frames]
q(uit
mem> quit



VM: Page and Frame Tables in MEM [176]

mem> alg 0
mem> mode 0
mem> init 8 3
mem> logical 1026
     Page Tbl   Frame Tbl   (Alg:0)
     frame bit       page
   0     0   0          1 < Fault 1
>  1     0   1         -1
   2     0   0         -1
   3     0   0 
   4     0   0 
   5     0   0 
   6     0   0 
   7     0   0 
Logical  Address page :  1   offset:    2
Physical Address frame:  0   offset:    2



[V.B] VM: FIFO using MEM [177]

mem> alg 0 
mem> mode 1
mem> init 8 3
mem> r 7 r 0 r 1 r 2 r 0 r 3 r 0 r 4 r 2 r 3 r 0 r 3 r 2 r 1 r 2 r 0 r 1 r 7 
     r 0 r 1
     page: 7  faults: 1  frames:  7 -1 -1  time:  1 
           0          2           7  0 -1         1  2 
           1          3           7  0  1         1  2  3 
           2          4           2  0  1         4  2  3 
           0          4           2  0  1         4  2  3 
           3          5           2  3  1         4  6  3 
           0          6           2  3  0         4  6  7 
           4          7           4  3  0         8  6  7 
           2          8           4  2  0         8  9  7 
           3          9           4  2  3         8  9 10 
           0         10           0  2  3        11  9 10 
           3         10           0  2  3        11  9 10 
           2         10           0  2  3        11  9 10 
           1         11           0  1  3        11 14 10 
           2         12           0  1  2        11 14 15 
           0         12           0  1  2        11 14 15 
           1         12           0  1  2        11 14 15 
           7         13           7  1  2        18 14 15 
           0         14           7  0  2        18 19 15 
           1         15           7  0  1        18 19 20



VM: Optimal Algorithm [178]



[V.B] VM: OPT using MEM [179]

mem> nogo
mem> r 7 r 0 r 1 r 2 r 0 r 3 r 0 r 4 r 2 r 3 r 0 r 3 r 2 r 1 r 2 r 0 r 1 r 7
     r 0 r 1
mem> go
     page: 7  faults: 1  frames:  7 -1 -1
           0          2           7  0 -1
           1          3           7  0  1 
           2          4           2  0  1 
           0          4           2  0  1 
           3          5           2  0  3 
           0          5           2  0  3 
           4          6           2  4  3 
           2          6           2  4  3 
           3          6           2  4  3 
           0          7           2  0  3 
           3          7           2  0  3 
           2          7           2  0  3 
           1          8           2  0  1 
           2          8           2  0  1 
           0          8           2  0  1 
           1          8           2  0  1 
           7          9           7  0  1 
           0          9           7  0  1 
           1          9           7  0  1



VM: Least Recently Used (LRU) [180]



VM: LRU_TIME using MEM [181]

     page: 7  faults: 1  frames:  7 -1 -1  time:  1 
           0          2           7  0 -1         1  2 
           1          3           7  0  1         1  2  3 
           2          4           2  0  1         4  2  3 
           0          4           2  0  1         4  5  3 
           3          5           2  0  3         4  5  6 
           0          5           2  0  3         4  7  6 
           4          6           4  0  3         8  7  6 
           2          7           4  0  2         8  7  9 
           3          8           4  3  2         8 10  9 
           0          9           0  3  2        11 10  9 
           3          9           0  3  2        11 12  9 
           2          9           0  3  2        11 12 13 
           1         10           1  3  2        14 12 13 
           2         10           1  3  2        14 12 15 
           0         11           1  0  2        14 16 15 
           1         11           1  0  2        17 16 15 
           7         12           1  0  7        17 16 18 
           0         12           1  0  7        17 19 18 
           1         12           1  0  7        20 19 18



VM: LRU_STACK [182]



VM: LRU_STACK using MEM [183]

     page: 7  faults: 1  frames:  7 -1 -1  stack:  7 
           0          2           7  0 -1          7  0 
           1          3           7  0  1          7  0  1 
           2          4           2  0  1          0  1  2 
           0          4           2  0  1          1  2  0 
           3          5           2  0  3          2  0  3 
           0          5           2  0  3          2  3  0 
           4          6           4  0  3          3  0  4 
           2          7           4  0  2          0  4  2 
           3          8           4  3  2          4  2  3 
           0          9           0  3  2          2  3  0 
           3          9           0  3  2          2  0  3 
           2          9           0  3  2          0  3  2 
           1         10           1  3  2          3  2  1 
           2         10           1  3  2          3  1  2 
           0         11           1  0  2          1  2  0 
           1         11           1  0  2          2  0  1 
           7         12           1  0  7          0  1  7 
           0         12           1  0  7          1  7  0 
           1         12           1  0  7          7  0  1



VM: LRU_REF [184]



VM: LRU Approximations [185]



Second-Chance (CLOCK) Algorithm [186]


\begin{picture}(560,354)(20,480)
\thicklines\put(120,735){\framebox (30,20){}}
\...
... 20,715){\makebox(0,0)[lb]{\raisebox{0pt}[0pt][0pt]{next victim}}}
\end{picture}






VM: CLOCK Circular Queue [187]





\begin{picture}(340,339)(40,480)
\thicklines\put( 40,500){\framebox (140,300){}}...
...310,580){\makebox(0,0)[lb]{\raisebox{0pt}[0pt][0pt]{frame table}}}
\end{picture}






VM: CLOCK using MEM [188]

     page: 7  faults: 1  frames:  7 -1 -1   ref:  1 
           0          2           7  0 -1         1  1 
           1          3           7  0  1         1  1  1 
           2          4           2  0  1         1  0  0 
           0          4           2  0  1         1  1  0 
           3          5           2  0  3         1  0  1 
           0          5           2  0  3         1  1  1 
           4          6           4  0  3         1  0  0 
           2          7           4  2  3         1  1  0 
           3          7           4  2  3         1  1  1 
           0          8           4  2  0         0  0  1 
           3          9           3  2  0         1  0  1 
           2          9           3  2  0         1  1  1 
           1         10           3  1  0         0  1  0 
           2         11           3  1  2         0  1  1 
           0         12           0  1  2         1  1  1 
           1         12           0  1  2         1  1  1 
           7         13           0  7  2         0  1  0 
           0         13           0  7  2         1  1  0 
           1         14           0  7  1         1  1  1



VM: ENHANCED Second Chance [189]

   class1: (ref=0,dirty=0) => good page to replace
   class2: (0,1) => not as good because old page needs to be written
   class3: (1,0) => not good because its recently referenced
   class4: (1,1) => definitely not good because it also has to be written

   PASS:    do
               a. if empty frame, take it
               b. if class1, take it
               c. if class2, then record first instance
               d. clear ref bit if class 2 has not been found yet
            until complete pass
            if class2 was found, take first instance
            invariant1: there are no free frames
            invariant2: there are only class1 and class2 because
                        all bits were cleared.

   if the first PASS does not succeed, try one more PASS



VM: ENHANCED using MEM [190]

    rpage: 7  faults: 1  frames:  7 -1 -1  ref,dirty:  1,0
           0          2           7  0 -1              1,0 1,0
    wpage: 1          3           7  0  1              1,0 1,0 1,1
           2          4           2  0  1              1,0 0,0 0,1
           0          4           2  0  1              1,0 1,0 0,1
           3          5           2  0  3              1,0 0,0 1,0
    wpage: 0          5           2  0  3              1,0 1,1 1,0
           4          6           4  0  3              1,0 0,1 0,0
           2          7           4  0  2              1,0 0,1 1,0
           3          8           4  3  2              0,0 1,0 1,0
           0          9           0  3  2              1,0 1,0 0,0
           3          9           0  3  2              1,0 1,0 0,0
           2          9           0  3  2              1,0 1,0 1,0
           1         10           0  1  2              0,0 1,0 0,0
           2         10           0  1  2              0,0 1,0 1,0
           0         10           0  1  2              1,0 1,0 1,0
           1         10           0  1  2              1,0 1,0 1,0
           7         11           0  1  7              0,0 0,0 1,0
           0         11           0  1  7              1,0 0,0 1,0
           1         11           0  1  7              1,0 1,0 1,0



VM: Counting Algorithms [191]



VM: LFU using MEM [192]

    page: 7  faults: 1  frames:  7 -1 -1  count: 1 
          0          2           7  0 -1         1  1 
          1          3           7  0  1         1  1  1 
          2          4           2  0  1         1  1  1 
          0          4           2  0  1         1  2  1 
          3          5           2  0  3         1  2  1 
          0          5           2  0  3         1  3  1 
          4          6           4  0  3         1  3  1 
          2          7           4  0  2         1  3  1 
          3          8           3  0  2         1  3  1 
          0          8           3  0  2         1  4  1 
          3          8           3  0  2         2  4  1 
          2          8           3  0  2         2  4  2 
          1          9           3  0  1         2  4  1 
          2         10           3  0  2         2  4  1 
          0         10           3  0  2         2  5  1 
          1         11           3  0  1         2  5  1 
          7         12           3  0  7         2  5  1 
          0         12           3  0  7         2  6  1 
          1         13           3  0  1         2  6  1



VM: MFU using MEM [193]

     page: 7  faults: 1  frames:  7 -1 -1  count: 1 
           0          2           7  0 -1         1  1 
           1          3           7  0  1         1  1  1 
           2          4           2  0  1         1  1  1 
           0          4           2  0  1         1  2  1 
           3          5           2  3  1         1  1  1 
           0          6           2  3  0         1  1  1 
           4          7           4  3  0         1  1  1 
           2          8           4  2  0         1  1  1 
           3          9           4  2  3         1  1  1 
           0         10           0  2  3         1  1  1 
           3         10           0  2  3         1  1  2 
           2         10           0  2  3         1  2  2 
           1         11           0  1  3         1  1  2 
           2         12           0  1  2         1  1  1 
           0         12           0  1  2         2  1  1 
           1         12           0  1  2         2  2  1 
           7         13           7  1  2         1  2  1 
           0         14           7  0  2         1  1  1 
           1         15           7  0  1         1  1  1



Replacement Algorithm Performance [194]





\begin{picture}(520,264)(0,560)
\thicklines\put(180,800){\circle*{14}}
\put(180,...
...}
\put(400,700){\makebox(0,0)[lb]{\raisebox{0pt}[0pt][0pt]{FIFO}}}
\end{picture}




mem> mode 2
mem> init 8 8



VM: Belady's Anomaly [195]





\begin{picture}(520,264)(0,560)
\thicklines\put(160,700){\circle*{14}}
\put(200,...
...}
\put(420,660){\makebox(0,0)[lb]{\raisebox{0pt}[0pt][0pt]{FIFO}}}
\end{picture}






VM: Belady's Anomaly using MEM [196]

     page: 1  faults: 1  frames:  1 -1 -1  time:  1 
           2          2           1  2 -1         1  2 
           3          3           1  2  3         1  2  3 
           4          4           4  2  3         4  2  3 
           1          5           4  1  3         4  5  3 
           2          6           4  1  2         4  5  6 
           5          7           5  1  2         7  5  6 
           1          7           5  1  2         7  5  6 
           2          7           5  1  2         7  5  6 
           3          8           5  3  2         7 10  6 
           4          9           5  3  4         7 10 11 
           5          9           5  3  4         7 10 11 
     page: 1  faults: 1  frames:  1 -1 -1 -1  time:  1 
           2          2           1  2 -1 -1         1  2 
           3          3           1  2  3 -1         1  2  3 
           4          4           1  2  3  4         1  2  3  4 
           1          4           1  2  3  4         1  2  3  4 
           2          4           1  2  3  4         1  2  3  4 
           5          5           5  2  3  4         7  2  3  4 
           1          6           5  1  3  4         7  8  3  4 
           2          7           5  1  2  4         7  8  9  4 
           3          8           5  1  2  3         7  8  9 10 
           4          9           4  1  2  3        11  8  9 10 
           5         10           4  5  2  3        11 12  9 10



VM: Allocation of Frames [197]



VM: Thrashing [198]

Scenario 1:

Scenario 2:



VM: Thrashing [199]





\begin{picture}(515,264)(5,560)
\thicklines\put(100,800){\line( 0,-1){240}}
\put...
...t(370,790){\makebox(0,0)[lb]{\raisebox{0pt}[0pt][0pt]{thrashing}}}
\end{picture}



VM: Thrashing Solutions [200]



VM: Working-Set Model [201]





\begin{picture}(695,94)(0,720)
\thicklines\put(210,740){\vector( 0, 1){ 55}}
\pu...
...}}
\put(695,800){\makebox(0,0)[lb]{\raisebox{0pt}[0pt][0pt]{...}}}
\end{picture}






VM: Page-Fault Frequency Strategy [202]





\begin{picture}(520,264)(0,560)
\thicklines\put(100,800){\line( 0,-1){240}}
\put...
...box(0,0)[lb]{\raisebox{0pt}[0pt][0pt]{decrease number of frames}}}
\end{picture}



VM: Program Structure [203]

     int A[128][128];    /* ROW MAJOR: A[0][0], A[0][1], A[0][2] ...*/
     for (i=0; i<= 127; i++)
       for (j=0; j<= 127; j++)
          A[i][j] = 0;

     for (j=0; j<= 127; j++)
       for (i=0; i<= 127; i++)
          A[i][j] = 0;


next up previous contents
Next: File Management Up: Memory Management Previous: Virtual Memory   Contents
Ted Billard 2001-11-17